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AMD Strix Point mobile CPU pictured, shows notable upgrades over Phoenix

What just happened? Team Red is firing on all cylinders with their latest “Strix Point” mobile processors launching this summer, representing a generational upgrade over last year’s Phoenix chips. New images are out, and the most obvious change is the die size increase from 9.06mm x 15.01mm on Phoenix to 12.06mm x 18.71mm, allowing for some serious under-the-hood upgrades. AMD Strix Point mobile CPU pictured, shows notable upgrades over Phoenix

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At the core is a hybrid x86 CPU design with two clusters: one packing four beefy Zen 5 cores and 16MB of L3 cache, while the other has eight efficiency-focused Zen 5c cores each with 8MB L3. The clusters communicate via AMD’s trusty Infinity Fabric interconnect.

But the real star of the show is the integrated RDNA 3.5 GPU. This unit features 16 compute units translating to 1,024 stream processors, plus four render backends and 2MB of L2 cache to feed that beast with data. AMD had previously shared some official benchmarks for the architecture, showing how it’s more than a simple mid-cycle refresh over last year’s RDNA 3.

Multimedia is also a focus area, with dedicated media and display engines accelerating video encoding/decoding and display output. The media engine handles the latest codecs like AV1, H.264, and H.265. The display engine compresses and encodes the GPU’s rendered frames for seamless output over DisplayPort, HDMI, and embedded display connections. These hardware blocks optimize Strix Point for smooth video playback and content creation.

Then there’s AMD’s second-gen AI engine, which is based on the XDNA 2 architecture and features 32 tiles with a throughput of 50 TOPS. It’s actually the third main logic component of the chip and is visibly larger than its Phoenix counterpart. This NPU is built to keep up with advanced AI workloads like Microsoft’s Copilot+ assistant.AMD Strix Point mobile CPU pictured, shows notable upgrades over Phoenix

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Memory support gets an upgrade too with a dual-channel DDR5/LPDDR5 controller running at high speeds, along with an integrated SRAM cache similar to previous AMD designs. The PCIe root complex has slimmed down to 16 lanes from 20 on Phoenix.

Under the hood, AMD has transitioned to TSMC’s N4P process tech – an enhanced version of N4 used in the previous iteration. This unlocks higher clocks and better power efficiency.

All told, Strix Point is shaping up to be a massive upgrade. The iGPU grunt especially should allow for decent 1080p gaming without a discrete GPU.

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